The reset registers are a set of registers that correspond to the enable registers. The reset register where setting a bit will clear the chosen clock.Clearing the bit will not result in any action. To enable a clock a bit in the enable register is set. The enable register presented in the previous section.The peripheral clock enabled is controlled using two registers Resetting the Peripheral Clock Enable Registers The following code illustrates code to initialise USART2 The clock control register RCC_CR will be used to enable and select the clock source while the clock configuration register RCC_CFGR will be used to determine the final bus frequencies. The STM32F407 microcontroller system clock can come from one of three sources: Setting the prescalers to provide the required bus frequencies.Setting the system clock: That is select HSI, HSE or the PLL as the system clock.It will be necessary to understand the requirements of the chosen peripherals as part of configuring the micro-controller clock circuitry. It will therefore be the responsibility of the programmer to enable the clock to those subsystems and if necessary generate the appropriate bus frequencies. In contrast to many microcontrollers that have peripherals or subsystems where the clock signals are continuously active, to conserve power the STM32F407 does not.
By default this clock will also be the clock to the AHB (Advanced High Speed Bus), and the peripheral buses APBx (Advanced Peripheral Bus). To satisfy the clock requirements for these peripheral devices the STM32F407 includes a very flexible clocking arrangement.įollowing reset the High Speed Internal Clock (HSI) will be selected. These peripherals all have different protocols and requirements. The STM32F407 micro-controller is capable of interfacing to a large range of peripheral devices or sub-systems. Basic clock circuitry for the STM32F407 ARM processor.
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